A Novel Realization of Reversible LFSR For Its Application in Cryptography

Authors:A. PREETHI, M. MOSHE

0822-0824

Low-Power Programmable PRPG with Test Compression Capabilities

Authors:P. SUJATHA, M. MOSHE

0825-0832

Magnetic Logic Circuit Design using MRAM-MTJ

Authors:Y.KIRAN, VENTRAPRAGADA TEJU

0833-0839

Implementation of Carry Skip Adder using High-Speed Skip Logic At Different Level

Authors:B. ROJA RAO, V. PRASAD

0840-0843

Design And Implementation of Reverse Converter Design using Hybrid Parallel-Prefix Adders

Authors:V. DINESHBABU, U. SOMALATHA

0844-0848

An Effective Dissipation Logic for Traditional Chips

Authors:SANA QUDDUSI, N. SHYAMSUNDER

0849-0851

A LPM-Based Compressor Optimistic Response Logic

Authors:BOMMA CHAITHANYA, M. SHYAM SUNDER

0852-0854

A New Secure Image Transmission Technique Via Secret-Fragment-Visible Mosaic Images by Nearly Reversible Color Transformations

Authors:MUDDASU BHARATH, E.BALAKRISHNA

0855-0863

Power and Area Efficient Approximation Wallace Tree Multiplier For Error –Resilient Systems

Authors:BALACHANDRA, G.RASHEED

0864-0871

An Extended True Single Phase Clock Based Divide-By-2/3 Frequency Divider with Pass Transistor Logic for Low Voltage and Low Power Applications

Authors:TALLAPUDI SOWMRITRI TRIVEDI, M. NAGENDRA KUMAR

0872-0876